Friday, July 25, 2008

VLSI Interview Questions - Part 3

What is Molecular beam epitaxy?

What is Scanning tunneling microscopy?

number of holes in a conducting metal?

Testing and verification difference

Defect Based Testing

What is yield loss?

what is Rent's rule?

GaAs is a piezo electric. Is it true?

How many lattices are there in a 3D crystal structure. explain?

How to achieve high throughput from a digital design?

Difference between Iterative and Pipelined implementation?

How to reduce latency in a Pipeline design?

What is the effect of removing pipeline registers in a design to latency?

How to calculate the Maximum frequency of the clock in a digital design(Sequential)?

What is Flatten Logic structure?

What is register balancing?

Define wander and Jitter?

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